1. Field of the Invention
The present invention relates to package structures and fabrication methods thereof, and more particularly, to a package structure having a non-rectangular shape and a fabrication method thereof.
2. Description of Related Art
Along with the progress of semiconductor packaging technologies, various package types have been developed for semiconductor devices. As electronic products are developed toward the trend of miniaturization and high operational speed, electrical performances and capacities of single semiconductor package structures need to be improved. Accordingly, multichip modules are designed for semiconductor package structures. Such a packaging method allows merging of heterogeneous technologies in a system-in-package (SiP) so as to systematically integrate a plurality of electronic elements having different functions, such as a memory, a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), an image application processor and so on. As such, two or more chips are integrated in a single package structure, which not only reduces the overall size of the electronic product, but also improves the electrical performance. That is, the limit on the system operational speed is minimized Further, the multichip package structure shortens interconnection length between chips and reduces signal delay and access time.
FIG. 1 is a perspective view of a conventional package structure 1, and FIGS. 1A to 1C are schematic cross-sectional views showing the package structure 1 in different configurations. Referring to FIG. 1 and FIGS. 1A to 1C, the package structure 1 has: a substrate 10, a plurality of electronic elements 11a, 11b, 11c disposed on the substrate 10, and an encapsulant 13 encapsulating the electronic elements 11a, 11b, 11c. The substrate 10 is a circuit board and has a rectangular shape. The electronic elements 11a, 11b, 11c are disposed on and electrically connected to the substrate 10.
In the package structure 1, the encapsulant 13 is of a rectangular shape and has a large ineffective space S. That is, no electronic elements or circuits are formed in the space S. The ineffective space S increases the size of the package structure 1 and reduces the packaging density. Consequently, the final product cannot meet the miniaturization requirement.
Further, during a subsequent assembling process, the design of an external component (not shown) will be limited by the shape of the encapsulant 13 and cannot be changed according to the practical need, thus reducing the design flexibility.
Therefore, how to overcome the above-described drawbacks has become critical.